Data and Analysis

**Figure 4.99:** ACIS dark current data at T = -40 $\mbox{$^{\circ}$ }$ C.
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T = -40 $\mbox{$^{\circ}$ }$ C: Figure 4.99 contains the data for the T = -40 $\mbox{$^{\circ}$ }$ C data. The two backside illuminated (BI) chips (S1 and S3) have a considerable number of hot pixels, as evident by the large, extended tail. The frontside illuminated (FI) chips also have a small number of hot pixels. At this relatively warm temperature, such behavior is expected in both the BI and FI chips.

**Figure 4.100:** ACIS dark current data at T = -60 $\mbox{$^{\circ}$ }$ C.
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T = -60 $\mbox{$^{\circ}$ }$ C: Figure 4.100 contains the data for the T = -60 $\mbox{$^{\circ}$ }$ C data. With a drop of 20 $\mbox{$^{\circ}$ }$ C, the dark current in the FI chips is reduced about a factor of 20. The FI chips also have fewer hot pixels at this colder temperature. The dark current in the BI chips is also dramatically reduced. S3 continues to have many hot pixels, and while S1 still exhibits a tail, quadrant by quadrant analysis reveals that most of the tail is attributable to quadrant D (the distribution D does not exceed 50 ADU for quadrants A,B, & C).

**Figure 4.101:** ACIS dark current data at T = -90 $\mbox{$^{\circ}$ }$ C.
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T = -90 $\mbox{$^{\circ}$ }$ C: Figure 4.101 contains the data for the T = -90 $\mbox{$^{\circ}$ }$ C data. At this temperature, the dark current is effectively zero. The difference distributions D are very gaussian, but often have negative centers. These unphysical dark currents arise due to systematic uncertainties, on order of 1 ADU, in calculating the bias. For the relatively short exposure times used and the systematic uncertainties, we cannot precisely measure the a priori low dark current (< 0.1 ADU/sec) expected at a temperature of -90 $\mbox{$^{\circ}$ }$ C. With the exception of the hot pixel tail exhibited by S1 and the slightly large width of both S1 and S3, the BI chips are virtually indistinguishable from the FI chips. The secondary feature centered around 9 ADU in I0 is due to an instrumental artifact seen in the long (9.9 second) integration data. Examination of the average long frame reveals that the top portion (roughly the first 100 rows) of the bias map is much higher than the rest of the frame. The average short (3.3 second) frame is uniform across the chip. When it is subtracted from the average long frame, the bimodal distribution results. It is suspected that this behavior is due to insufficient settling time between switching ACIS from operation in the the S-array configuration to operation in the I-array configuration.