Digital data from the CCD are clocked out of the ADC into a 12 bit FIFO (IDT 7202LA120-DB), from which they are transferred to the event recognition circuitry. At about 33 kilopixels per second, each CCD takes about 13.5 seconds to read out. The data are passed under DMA control from the FIFO to a revolving four line buffer RAM area that holds four CCD rows. The ICP (Image & Control Processor) processes the data in this buffer as described in §4.4.15.